Dear Job Seekers,
Our Client is Hiring for:
Industry Type: Semiconductors, Electronics
Functional Area: Engineering Design, R&D
Role Category: Engineering Design
- RTL coding, System Verilog, and general design and debug
- Frontend digital design flows, design tools, synthesis, timing closure, simulation
- Datapath, control, and subsystem components in System Verilog
- System latency, bandwidth, area, and power tradeoffs.
- Implement and integrate high-speed interfaces, low-latency, and high-performance subsystems
- Experience with DDR memory and high-speed peripherals
- Experience with integration of CPU and/or GPU
- Strong knowledge of C/C++ or Python scripting.
Experience: 3 - 10 Years
Notice Period: Immediate
Salary: As per the Company Standards