Dear Job Seekers,
Qualcomm is Hiring for:
Job Title: ASIC IP cores design
- Candidates will be responsible for IP design and integrating IP subsystems to develop differentiated ML solutions for XR.
- This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, RTL design and integration along with close interactions with verification, SoC Design, Validation, Synthesis & PD teams for design convergence.
- Skills 3-5 years of work experience in ASIC IP cores design (1 position) Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering Experience in System Verilog, Verilog, C/C++, Perl and Python.
- Knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like PCIE.
- Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power design is required
- Hands on experience in Multi Clock designs, Asynchronous interface is a must.
- Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.
- Understanding of constraint development and timing closure is a plus.
- Experience in Synthesis / Understanding of timing concepts is a plus.
- Strong experience in micro architecting RTL design from high level design specification.
- Excellent problem-solving skills, strong communication and team work skills are mandatory.
- Self-driven, needs to work with minimum supervision.
- Ability to lead a small design team.
- Good knowledge of Microprocessor design fundamentals, Computer Architecture, Basic Image Processing, signal processing, fixed point arithmetic, devices and circuits is highly desirable.
Experience: 3-5 years
Salary: As per the Company Standards